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"We selected a PLL from TCI because of the company's PLL expertise and
reputation for supplying proven PLL hard macros. The TCI 1.2GHz clock
generator PLL is the core component that allows the multi-rate SONET/SDH
ports on the ADM-on-a-Chip to operate within the required industry
jitter specifications across all supported rates."
Kent Goodin, Vice President, VLSI Engineering, Parama Networks
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The Verilog model is very close but not perfect.
- In steady state, the Verilog model does not model any jitter that
might be present in the real PLL.
- During startup, the Verilog model will achieve lock much more quickly than the actual PLL....
- ...
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