"The Livanto™ wireless-soft modem is targeted at next generation mobile phones and high performance wireless applications, plus it is fabricated in a 90nm process, so we spent a fair amount of time selecting suitable IP and designing the best clocking system possible. True Circuits' IP gave us high implementation flexibility and provided us with the functionality we required, while meeting our strict power, area and cost targets."

Peter Hughes
Vice President of Silicon Operations
Icera Inc.



A TCI deskew PLL, which provides phase-aligned divide by 1, 2, and 4 clock outputs, can facilitate generating the system clock signals, data strobes, and internal double frequency clocks used to clock the output data. Spread-spectrum PLLs can also be used to generate the system clock to lower EMI emissions.


5 Mar 13 Common Platform Technology Forum
Santa Clara, California

9 Apr 13 TSMC NA Technology Symposium
San Jose, California

16 Apr 13 TSMC NA Technology Symposium
Austin, Texas

18 Apr 13 GSA Silicon Summit
Mountain View, California

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