"TCI's low-jitter high-resolution clock generator PLL helped us produce a more flexible IC for our customers and enabled us to meet our time-to-market goals. The True Circuits IP enabled us to set up multiple clock domains on a single SOC that previously required five separate ICs."

Gerard Yeh
Director of VLSI Design
Oak's TeraLogic Group



The PLL licensing fees do not include royalties. They permit a specific TCI PLL design for a specific semiconductor process to be used in a single production chip design and its future versions that correct functionality. TCI PLLs can be used on additional chip designs for additional licensing fees.


30 May 14 True Circuits Showcases Revolutionary New DDR 4/3 PHY at Design Automation Conference

22 Oct 13 See Our Ad in the Fall Issue of Chip Design Magazine

03 Jun 13 True Circuits Introduces Revolutionary New DDR 4/3 PHY at Design Automation Conference

28 Jan 13 See Our Ad in the Winter Issue of Chip Design Magazine

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