"The Livanto™ wireless-soft modem is targeted at next generation mobile phones and high performance wireless applications, plus it is fabricated in a 90nm process, so we spent a fair amount of time selecting suitable IP and designing the best clocking system possible. True Circuits' IP gave us high implementation flexibility and provided us with the functionality we required, while meeting our strict power, area and cost targets."

Peter Hughes, Vice President of Silicon Operations, Icera Inc.



The chip should have separate analog supply pads for the PLL. The PLL should be located near the edge of the chip, away from large output busses. See the "User Guidelines" document for additional information.


31 Mar - 1 Apr 09 IP Symposium
San Jose, California

21 Apr 09 TSMC U.S. Technology Symposium
San Jose, California

26-31 Jul 09 Design Automation Conference
San Francisco, California

1 Oct 09 GSA Emerging Opportunities Expo & Conference
Santa Clara, California

Copyright © 2002-2009 True Circuits, Inc. All Rights Reserved