"Nuvoton Israel needed a high performance, wide spectrum, scalable and accurate timing solution for our industry leading server management SoC design. We found True Circuits' clock generator PLLs a perfect match to our design needs in various process nodes to date."

Uri Trichter
Senior Director Server BU
Nuvoton Technology Corp.



When calculating the timing budgets, one may need to consider the worst-case static phase offset, duty cycle error, cycle-to-cycle jitter, and possibly tracking jitter from the PLL, the worst-case skew and jitter from the clock distribution, and the worst-case setup, hold, and clock-to-output times for the clocked elements.


06 Apr 15 True Circuits Announces New Line of PLLs, The Ultra PLL

30 May 14 True Circuits Showcases Revolutionary New DDR 4/3 PHY at Design Automation Conference

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03 Jun 13 True Circuits Introduces Revolutionary New DDR 4/3 PHY at Design Automation Conference

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