"We selected TCI's clock generator PLL because of its small size, wide frequency range and superior low-jitter performance. This will enable our ASIC customers to successfully implement multiple SPI-4.2 macros in their high-end telecommunication ASICs and help meet the tight jitter and power budgets required for 10 Gbps SONET/SDH systems."

Hideya Horikawa
Senior Design Engineering Manager
Renesas



Not usually. All our cell names are prefixed by "TCI_cellname_". As a result, our PLLs do not conflict with each other, and they usually don't conflict with our customers' cell names.


20 Jun 18 True Circuits Attends Design Automation Conference

15 May 18 True Circuits Provides Low Power PLL Technology to SiFlower in China

07 May 18 True Circuits Signs Multi-year PLL License with Canaan Creative in China

07 Nov 17 True Circuits Signs Five Year PLL License with Tsinghua University in China

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