"The increasing demand for performance-intensive handheld devices and rising time-to-market pressures heightens the need for design turnkey providers to endow ASIC customers with more predictable and robust SoC solutions. With True Circuits' PLL and DLL at TSMC 55nm, we were able to achieve low jitter for DDR 800Mbps and enter into mass production with very stable yield."

Yao Lee
Strategic Marketing Manager
Alchip Technologies



It is not in our business interest to release the proprietary aspects of our PLL designs. Our design kits do not include any internal schematics and our licensing agreement does not permit reverse engineering of our PLL designs.


14 Jun 17 True Circuits Attends Design Automation Conference

14 Mar 17 True Circuits Showcases State-of-the-art PLLs and 16nm IP

30 May 16 True Circuits Attends Design Automation Conference

14 Mar 16 True Circuits Announces New Line of IoT PLLs

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