"Our connected media devices deliver class-leading performance at the lowest possible power consumption. True Circuits' clock generator PLLs have wide programmable frequency ranges, low jitter, small area and low power. This mix of performance and functionality enables us to offer our customers highly differentiated IP cores in advanced process technologies."

Mark Dunn
General Manager IMGworks
Imagination Technologies



A TCI deskew PLL, which provides phase-aligned divide by 1, 2, and 4 clock outputs, can facilitate generating the system clock signals, data strobes, and internal double frequency clocks used to clock the output data. Spread-spectrum PLLs can also be used to generate the system clock to lower EMI emissions.


18 Jan 11 Common Platform Technology Forum
Santa Clara, California

5 Apr 11 TSMC U.S. Technology Symposium
San Jose, California

7 Apr 11 TSMC U.S. Technology Symposium
Austin, Texas

31 May 11 TSMC U.S. Technology Symposium
Shanghai, China

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