"We have been licensing TCI PLLs for our network processors and data and traffic management chips for two years. TCI has always delivered PLLs to us that worked the first time. They have spec'ed and delivered the PLLs as promised, and their expertise in PLL design has been unquestionable."

George Serhan, VLSI Director, AMCC

The chip should have separate analog supply pads for the PLL. The PLL should be located near the edge of the chip, away from large output busses. See the "User Guidelines" document for additional information.