"The Livanto™ wireless-soft modem is targeted at next generation mobile phones and high performance wireless applications, plus it is fabricated in a 90nm process, so we spent a fair amount of time selecting suitable IP and designing the best clocking system possible. True Circuits' IP gave us high implementation flexibility and provided us with the functionality we required, while meeting our strict power, area and cost targets."

Peter Hughes
Vice President of Silicon Operations
Icera Inc.



The cycle-to-cycle jitter for a divided output clock is the same percentage of the divided clock period as that for an undivided clock in the worst case of low-frequency supply/substrate noise. However, the cycle-to-cycle jitter for any divided clock expressed in units of time cannot exceed twice the long-term jitter by their definitions.


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