"Our connected media devices deliver class-leading performance at the lowest possible power consumption. True Circuits' clock generator PLLs have wide programmable frequency ranges, low jitter, small area and low power. This mix of performance and functionality enables us to offer our customers highly differentiated IP cores in advanced process technologies."

Mark Dunn
General Manager IMGworks
Imagination Technologies



The Verilog model is very close but not perfect.

  • In steady state, the Verilog model does not model any jitter that might be present in the real PLL.
  • During startup, the Verilog model will achieve lock much more quickly than the actual PLL....
  • ...


22 Apr 14 TSMC NA Technology Symposium
San Jose, California

1 May 14 TSMC NA Technology Symposium
Austin, Texas

2-4 Jun 14 Design Automation Conference
San Francisco, California

30 Sep 14 TSMC OIP Ecosystem Forum
San Jose, California

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